ArticlechipsDeep read

Why only a few foundries make the leading-edge chips

BitByteCore Silicon DeskJul 31, 20268 min

Leading-edge chip manufacturing has collapsed to a handful of companies, in practice one clear leader and two challengers. The reasons are structural: staggering cost, an unforgiving learning curve, and a feedback loop that punishes falling behind. Here is how it works.

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Most companies that design chips do not manufacture them. They send the design to a foundry, a company whose entire business is fabricating other people's silicon, and pay per wafer. Apple, NVIDIA, AMD, and Qualcomm all work this way; the term for it is fabless. At the leading edge, where the newest and most capable chips are built, the number of foundries that can actually do the work has shrunk to a very short list: TSMC dominates it, and Samsung and Intel are the only others still attempting leading-edge logic at all. Understanding why explains a lot about how the whole industry above them behaves.

The cost of staying at the front#

Building a leading-edge fabrication plant is one of the most expensive undertakings in any industry. A single fab runs into the tens of billions of dollars, and the specialized equipment inside it is both scarce and staggeringly expensive.

The clearest example is lithography, the step that prints circuit patterns onto a wafer. The tool that prints the finest features, an extreme-ultraviolet (EUV) lithography machine, is among the most complex devices ever built, and exactly one company on Earth makes it: ASML, in the Netherlands. A standard EUV system costs well over one hundred million dollars, and the newest generation, High-NA EUV, runs to several hundred million dollars each. A leading-edge fab needs a fleet of them, not one.

That cost structure has a brutal logic. To justify the investment, a foundry needs enormous volume flowing through the plant every day it operates. Volume requires customers. Winning customers requires already being at the leading edge, because that is what they came for. The result is a flywheel that rewards the companies already ahead and makes it nearly impossible for a new entrant to break in: you need the leading edge to earn the volume, and you need the volume to fund the leading edge.

Why falling behind is hard to reverse#

Leading-edge manufacturing is not just about money. It depends on accumulated know-how that is difficult to acquire and difficult to keep.

What this means for you

What capital alone cannot buy

Yield. Getting a high fraction of working chips off each wafer takes years of tuning. A new process can start with a large share of every wafer unusable and climb only by running real silicon, at scale, and learning from what fails.
Process maturity. Each node generation builds on the last. The move from FinFET transistors to gate-all-around nanosheet transistors at the 2nm class, as TSMC did on its N2 node that entered volume production in late 2025, rests on a decade of prior work. Skip a generation and the gap compounds.
Ecosystem. Design tools, photomask and materials suppliers, and advanced-packaging partners all have to be ready and qualified for a process before a customer can ship on it. That ecosystem forms around the leaders first, which pulls the next wave of customers toward them too.

A company that falls a generation behind does not just lose a year. It loses the volume that funds the next plant, the customers that fund the volume, and the experience that improves the yield. The disadvantage feeds itself.

This is why the leading edge has consolidated. Companies that could not sustain both the investment and the learning curve dropped back to making older, still-profitable chips or exited leading-edge work entirely. A few stayed at the front, and the gap between them and everyone else widened. The strain shows even among the survivors: TSMC has stayed with standard-NA EUV plus multiple patterning for its initial 2nm generation, judging High-NA too costly to justify yet, while Intel bet on being the first to adopt it in high-volume production. Even the front-runners disagree on when the newest tool starts to pay for itself.

What the concentration means upstream#

The companies that design chips, including the ones whose names end up on phones, laptops, and AI accelerators, sit on top of this narrow base. That has consequences.

What this means for you

Three consequences upstream

Scheduling power. Capacity at the leading edge is limited, so access to it is a real advantage. The largest customers can reserve the first wave of a new node's output; Apple has done this for years, which is part of why its newest chips ship on the newest process before anyone else's.
Shared fate. When most advanced designs, from phone chips to server processors to the AI accelerators driving the current buildout, route through the same small set of plants, a disruption at one of them ripples across many products at once.
Geographic concentration. Leading-edge capacity clusters in a few places, with the bulk of it in Taiwan. That is why chip manufacturing has become a matter of national strategy and large public investment, from the US CHIPS Act to comparable programs in the EU, Japan, and elsewhere.

The pushback, and its limits#

Governments and large firms have responded by funding new plants and pushing manufacturing across more regions. TSMC is now building fabs in Arizona, Japan, and Germany with heavy public subsidy, and that effort is real; it will change where some chips get made. But it does not change the underlying economics. A new plant still needs volume, know-how, and an ecosystem, and those take years to build even with generous funding. The most advanced nodes and the bulk of process research still sit in Taiwan.

The more likely outcome is not a sudden broadening of the leading edge but a slow diversification of where the existing leaders build, paired with renewed investment in older, mature nodes. Most chips in everyday products, from cars to appliances to industrial gear, do not need the leading edge at all, and a large share of the new capacity money is going exactly there. The front of the line stays narrow. The rest of the line gets more attention than it has had in years.

The short version: leading-edge foundry work concentrated because the cost is staggering, the learning curve is unforgiving, and falling behind is self-reinforcing. That structure shapes everything built on top of it, and it will not loosen quickly.

Why don't most chip design companies manufacture their own chips?

Most chip designers are fabless: they send their designs to a foundry, a company whose entire business is fabricating other companies' silicon, and pay per wafer. Building and running a leading-edge fabrication plant costs tens of billions of dollars and demands know-how that takes years to build, so firms like Apple, NVIDIA, AMD, and Qualcomm rely on foundries such as TSMC instead.

Why has leading-edge chip manufacturing concentrated into so few companies?

The cost of a leading-edge fab is staggering: the plant runs into tens of billions of dollars, and a single EUV lithography machine, made only by ASML, costs from well over one hundred million dollars to several hundred million for the newest High-NA generation. Justifying that requires enormous volume, and winning that volume requires already being at the leading edge. Combined with accumulated know-how like yield tuning and process maturity that takes years to build, this creates a self-reinforcing cycle that rewards companies already ahead. In practice only TSMC, Samsung, and Intel still attempt leading-edge logic.

Why is it so hard for a foundry to catch up once it falls behind?

Falling a generation behind means losing the volume that funds the next plant, the customers that fund that volume, and the experience that improves yield. Each node generation builds on the last, so transitions like moving from FinFET to gate-all-around nanosheet transistors at the 2nm class rest on a decade of prior work, and skipping a generation compounds the gap. The disadvantage feeds itself, which is why capital alone rarely closes it.

What does foundry concentration mean for companies that design chips?

Because capacity at the leading edge is limited, the largest customers who commit to volume get scheduling priority and reach the newest process first. A disruption at one plant can ripple across many products at once, and the geographic clustering of capacity, much of it in Taiwan, has made chip manufacturing a matter of national strategy and large public investment.

Will government funding broaden the number of leading-edge foundries?

It will change where some chips are made, since TSMC is building subsidized fabs in Arizona, Japan, and Germany, but not the underlying economics. A new plant still needs volume, know-how, and a qualified ecosystem that take years to build. The likely outcome is slow geographic diversification by the existing leaders, plus heavy investment in older, mature nodes that most everyday products actually run on, rather than a sudden broadening of the leading edge.