What a Nanometer Process Node Really Means

When a chipmaker announces a 2nm processor, the natural assumption is that something on the chip is two nanometers across. That assumption is wrong, and the industry knows it is wrong. The node name is a marketing label. It has not described a real physical dimension for well over a decade, and as the numbers shrink toward the low single digits, the gap between the label and the silicon only gets wider.

Understanding why matters, because the node number drives an enormous amount of buying behavior and competitive framing. People compare a 3nm part from one company against a 2nm part from another and treat the smaller number as automatically better. The reality is messier, and more interesting.

Where the number came from#

In the early decades of chipmaking, the node name really did mean something. It roughly tracked physical features you could point to on the wafer, most often the gate length of a transistor, the channel through which current flows when the transistor switches, and the spacing between neighboring features. A 1-micron process had transistors with gate lengths around a micron. As manufacturers shrank those dimensions, switching got faster and chips got denser, so the number became a convenient shorthand for a whole generation of technology.

That link had been loosening for years, because printed gate lengths had already drifted below the node number for several generations. It broke for good around the move to FinFET transistors in the early 2010s, roughly the 28nm-to-22nm era, when gate-length scaling largely stalled. The physics got in the way. At very small gate lengths, current leaks across the channel even when the transistor is supposed to be off, a problem lumped together as short-channel effects. To keep transistors controllable, engineers stopped trying to shrink a single flat dimension and started changing the transistor's shape instead.

That shape change is the part the number cannot capture. FinFET stood the transistor channel up into a vertical fin so the gate could wrap around it on three sides. Gate-all-around, or GAA, nanosheet transistors, the current leading-edge design, stack the channel as thin horizontal sheets and wrap the gate completely around each one for tighter control of the current. And the newest structural change is not about the transistor at all: backside power delivery moves the power wiring beneath the transistors instead of crowding it above them. None of these are things a single nanometer number can describe, and the leading foundries adopted them on different schedules.

The same jump, made three different ways#

What the number tracks now#

The node name today is best understood as a generation marker. Each new node delivers some combination of three things, usually summarized as PPA.

A new node typically improves all three, but not by the amount the shrinking number implies. Going from 3 to 2 sounds like a 33 percent leap; the actual generational gains are far smaller. By TSMC's own stated figures, its first 2nm-class node, N2, offers roughly 10 to 15 percent more performance at the same power, or about 25 to 30 percent less power at the same speed, plus a density gain in the mid-teens over its 3nm generation. Real and worthwhile, and nothing like the jump the name suggests. A 2nm node does not mean transistors are a third smaller than 3nm in every dimension. It means the foundry is offering its next commercial generation, with documented gains you have to read from the actual specifications rather than infer from the name.

Why two 5nm chips are not the same#

There is no industry body that certifies what counts as a given node. Each foundry sets its own definitions. So one company's 5nm and another's 5nm can have meaningfully different transistor densities, and a 4nm process from one vendor is often a refinement of its own 5nm line rather than a true full-node step.

The clearest proof that the names are marketing is that a manufacturer rewrote them to compete. Intel's old 10nm process was roughly as dense as the foundries' 7nm, so in 2021 Intel dropped the mismatched numbers entirely and renamed the node Intel 7, then continued with Intel 4, Intel 3, and the angstrom-branded 20A and 18A. The transistors did not change when the label did. The label changed to line up with how everyone else was counting.

The more honest metric is transistor density, usually quoted in millions of transistors per square millimeter. That number is comparable across vendors in a way the node name is not. When you see two chips on nominally different nodes, the density figures often tell a different story than the labels suggest.

What this means in practice#

First, do not rank chips by node number alone. A well-designed part on an older, mature node can beat a poorly designed part on a newer one, especially because mature nodes have better yields and lower costs. The node is one input to a chip's quality, not a scoreboard.

Second, smaller nodes are getting harder and far more expensive. Each step now requires more complex lithography, more processing steps, and enormous capital investment. The cost per transistor, which fell reliably for decades, no longer drops as cleanly. That economic shift is a big part of why the industry leaned into chiplets and advanced packaging, splitting a design into smaller dies and stitching them together, instead of relying on a single ever-shrinking piece of silicon. AMD, Apple, Intel, and Nvidia all build their most ambitious parts this way now.

Third, the marketing will keep going, and it already has. The unit is changing from nanometers to angstroms, tenths of a nanometer, and that era is not hypothetical. Intel's 18A is in production in 2026, powering its Panther Lake laptop chips. The label 18A reads as 18 angstroms, or 1.8nm, but nothing on the chip is 1.8nm wide. It is the same kind of generation marker the nanometer became, one decimal place further down.

A process node is a name for a manufacturing generation. It once tracked a real dimension and no longer does. The useful questions are how many transistors fit per square millimeter, how much power they burn at a given speed, and how reliably the foundry can produce working chips at volume. The number in the marketing deck is a starting point for a conversation, not the answer to it.